MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 433

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

13.10.3.4 Continuous-Scan Modes
MPC555
USER’S MANUAL
single-scan enable bit. Software may set the single-scan enable bit again to allow an-
other scan of queue 1 to be initiated during the next open gate.
If the gate closes before queue 1 completes execution, the current CCW completes,
execution of queue 1 stops, the single-scan enable bit is cleared, and the PF1 bit is
set. Software can read the CWPQ1 to determine the last valid conversion in the queue.
Software must set the single-scan enable bit again and should clear the PF1 bit before
another scan of queue 1 is initiated during the next open gate. The start of queue 1 is
always the first CCW in the CCW table.
Interval Timer Single-Scan Mode. Both queues can use the periodic/interval timer in
a single-scan queue operating mode. The timer interval can range from 128 to 128
Kbytes times the QCLK period in binary multiples. When the interval timer single-scan
mode is selected and the software sets the single-scan enable bit in QACR1(2), the
timer begins counting. When the time interval elapses, an internal trigger event is cre-
ated to start the queue and the QADC64 begins execution with the first CCW.
The QADC64 automatically performs the conversions in the queue until a pause or an
end-of-queue condition is encountered. When a pause occurs, queue execution stops
until the timer interval elapses again, and queue execution continues. When the queue
execution reaches an end of queue situation the single-scan enable bit is cleared.
Software may set the single-scan enable bit again, allowing another scan of the queue
to be initiated by the interval timer.
The interval timer generates a trigger event whenever the time interval elapses. The
trigger event may cause the queue execution to continue following a pause, or may be
considered a trigger overrun. Once the queue execution is completed, the single-scan
enable bit must be set again to enable the timer to count again.
Normally only one queue will be enabled for interval timer single-scan mode and the
timer will reset at the end of queue. However, if both queues are enabled for either sin-
gle-scan or continuous interval timer mode, the end of queue condition will not reset
the timer while the other queue is active. In this case, the timer will reset when both
queues have reached end of queue.
The interval timer single-scan mode can be used in applications which need coherent
results, for example:
When the application software wants to execute multiple passes through a sequence
of conversions defined by a queue, a continuous-scan queue operating mode is se-
• When it is necessary that all samples are guaranteed to be taken during the same
• When the interrupt rate in the periodic timer continuous-scan mode would be too
• In sensitive battery applications, where the single-scan mode uses less power
/
scan of the analog pins
high
than the software initiated continuous-scan mode
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 15 October 2000
MOTOROLA
13-21