MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 593

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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16.4 TouCAN Operation
16.4.1 TouCAN Reset
16.4.2 TouCAN Initialization
MPC555
USER’S MANUAL
that buffer. For a message being transmitted, the time stamp entry is written into the
transmit message buffer once the transmission has completed successfully.
The free-running timer can optionally be reset upon the reception of a frame into mes-
sage buffer 0. This feature allows network time synchronization to be performed.
The basic operation of the TouCAN can be divided into three areas:
Example sequences for performing each of these processes is given in the following
paragraphs.
The TouCAN can be reset in two ways:
Following the negation of reset, the TouCAN is not synchronized with the CAN bus,
and the HALT, FRZ, and FRZACK bits in the module configuration register are set. In
this state, the TouCAN does not initiate frame transmissions or receive any frames
from the CAN bus. The contents of the message buffers are not changed following re-
set.
Any configuration change or initialization requires that the TouCAN be frozen by either
the assertion of the HALT bit in the module configuration register or by reset.
Initialization of the TouCAN includes the initial configuration of the message buffers
and configuration of the CAN communication parameters following a reset, as well as
any reconfiguration which may be required during operation. The following is a general
initialization sequence for the TouCAN:
• Reset and initialization of the module
• Transmit message handling
• Receive message handling
• Hard reset, using one of the IMB3 reset lines
• Soft reset, using the SOFTRST bit in the module configuration register
1. Initialize all operation modes
2. Initialize message buffers
/
MPC556
a. Initialize the transmit and receive pin modes in control register 0
b. Initialize the bit timing parameters PROPSEG, PSEGS1, PSEG2, and
c. Select the S-clock rate by programming the PRESDIV register
d. Select the internal arbitration mode (LBUF bit in CANCTRL1)
(CANCTRL0)
RJW in control registers 1 and 2 (CANCTRL[1:2])
Freescale Semiconductor, Inc.
For More Information On This Product,
CAN 2.0B CONTROLLER MODULE
Go to: www.freescale.com
Rev. 15 October 2000
MOTOROLA
16-11

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