MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 790

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555 / MPC556
USER’S MANUAL
0x30 4A80 –
0x30 4AFE
0x30 4B00 –
0x30 4B7E
0x30 4B80 –
0x30 4BFE
0x30 4C00
0x30 4C02
0x30 4C04
0x30 4C06
0x30 4C08
0x30 4C0A
0x30 4C0C
0x30 4C0E
0x30 4C10
0x30 4C12
0x30 4C14 –
0x30 4DFE
0x30 4E00 –
0x30 4E7E
0x30 4E80 –
0x30 4EFE
0x30 4F00 –
0x30 4F7E
0x30 4F80 –
0x30 4FFE
NOTES:
Address
1. Bit 3 (SSEx) is readable in test mode only.
Table A-8 QADC64 (Queued Analog-to-Digital Converter) (Continued)
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
—
S
T
S
1
1
RJURR_A
LJSRR_A
LJURR_A
QADC64MCR_B QADC64 Module Configuration Register
QADC64TEST_
B
QADC64INT_B
PORTQA_B/
PORTQB_B
DDRQA_B/
DDRQB_B
QACR0_B
QACR1_B
QACR2_B
QASR0_B
QASR1_B
CCW_B
RJURR_B
LJSRR_B
LJURR_B
Freescale Semiconductor, Inc.
MPC555 / MPC556 INTERNAL MEMORY MAP
For More Information On This Product,
Symbol
—
Go to: www.freescale.com
Rev. 15 October 2000
Result Word Table
Right-Justified, Unsigned Result Register.
See
Result Word Table
Left-Justified, Signed Result Register.
See
Result Word Table
Left-Justified, Unsigned Result Register.
See
QADC64 Test Register
Interrupt Register
Port A and Port B Data
Port A Data and Port B Direction Register
QADC64 Control Register 0
QADC64 Control Register 1
QADC64 Control Register 2
QADC64 Status Register 0
QADC64 Status Register 1
Reserved
Conversion Command Word Table
Result Word Table.
Right-Justified, Unsigned Result Register.
Result Word Table.
Left-Justified, Signed Result Register.
Result Word Table.
Left-Justified, Unsigned Result Register.
13.12.12
13.12.12
13.12.12
QADC_B
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Size
16
16
16
16
16
16
16
16
16
16
16
16
16
—
16
16
16
16
MOTOROLA
Reset
—
—
X
X
X
S
S
U
S
S
S
S
S
S
U
X
X
X
A-14