MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 544

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

15.7 MIOS1 I/O Ports
15.8 MIOS Bus Interface Submodule (MBISM)
15.8.1 MIOS Bus Interface (MBISM) Registers
15.8.1.1 MIOS1 Test and Pin Control Register
MIOS1TPCR — Test and Pin Control Register
MPC555
USER’S MANUAL
TEST
MSB
0
0
RESET:
If a supervisor privilege address space is accessed in user mode, the module returns
a bus error.
All MIOS1 unimplemented locations within the addressable range, return a logic 0
when accessed. In addition, the internal TEA (transfer error acknowledge) signal is as-
serted.
All unused bits within MIOS1 registers return a 0 when accessed.
Each pin of each submodule can be used as an input, output, or I/O port:
The MIOS bus interface submodule (MBISM) is used as an interface between the
MIOB (modular I/O bus) and the IMB3. It allows the CPU to communicate with the
MIOS1 submodules.
Table 15-2
1
0
/
MPC556
0x30 6808 –
0x30 680E
0x30 6800
0x30 6802
0x30 6804
0x30 6806
2
0
Address
is the address map for the MBISM submodule.
3
0
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
MIOS1 Test and Pin Control Register (MIOS1TPCR)
See
Reserved (MIOS1 Vector Register in some implementations)
MIOS1 Module Version Number Register (MIOS1VNR)
See
MIOS1 Module Control Register (MIOS1MCR)
See
Reserved
Freescale Semiconductor, Inc.
4
0
Submodule
For More Information On This Product,
MPWMSM
MPIOSM
MMCSM
MDASM
Table 15-3
Table 15-4
Table 15-4
Table 15-2 MBISM Address Map
Table 15-1 MIOS1 I/O Ports
5
0
Go to: www.freescale.com
Rev. 15 October 2000
for bit descriptions.
for bit descriptions.
for bit descriptions.
6
0
RESERVED
7
0
Number
16
2
1
1
Register
8
0
9
0
Type
10
0
I/O
I/O
I/O
I
11
0
12
0
13
0
0x30 6800
MOTOROLA
VF
14
0
VFLS
LSB
15-8
15
0