MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 654

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
Quantity:
853
Part Number:
MPC555LFMZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC555LFMZP40
Manufacturer:
MOT
Quantity:
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Part Number:
MPC555LFMZP40R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
19.1.1 MPC555 / MPC556 CMF Features
19.1.2 Glossary of Terms for the CMF EEPROM
MPC555
USER’S MANUAL
Up to eight unique 64-byte pages are programmed simultaneously in eight separate
array blocks of each of the two CMF modules. Each of the pages being programmed
simultaneously is located at the same block offset address, ADDR[17:25].
Erasing is performed on one or more of the selected block(s) simultaneously.
• Motorola’s one-transistor (MoneT) bit cell
• Reset configuration stored in special FLASH NVM locations
• Array sizes of 256 Kbytes and 192 Kbytes
• Arrays distributed in 32-Kbyte blocks
• Page mode read
• Supports U-bus pipelined accesses to a pipe depth of two
• Program up to 512 bytes at a time per CMF module
• Self-timed program and erase pulses
• Censored access mode with a user bypass for uncensored access per CMF mod-
• External 4.75 to 5.25-V VPP program and erase power supply
• External program or erase enable signal (EPEE)
• CMF arrays are hardware mapped to the first 512 Kbytes of the 4-Mbyte internal
• Supports external emulation
• Array block — 32-Kbyte contiguous block of information. Each array block may
• BIU — Bus interface unit controls access and operation of the CMF array through
• Cleared censorship — CENSOR[0:1] = 00. The CMF EEPROM can change to
/
ule
address space of the U-bus
be erased independently.
a standard U-bus interface.
— Erase by block(s)
— Block protection for program and erase operations
— Block access state control
— 32-bit word length
— Retains two separate pages per CMF module
— Page size of 32 bytes (eight words)
— Off-page read access time of two system clocks
— On-page read access time of one system clock
— Program up to eight unique 64-byte pages of data in eight separate blocks si-
— Program up to six unique 64-byte pages of data in six separate blocks simul-
— Program CMF Module A and CMF Module B at the same time
— Pages located at the same offset address
— Internal pulse width timing control generates pulses from 4.00 µs to 2.73 s us-
MPC556
• Select between supervisor and supervisor/user spaces
• Select between data and instruction/data spaces
multaneously (CMF Module A)
taneously (CMF Module B)
ing system clock frequencies from 8.0 MHz to 40.0 MHz
Freescale Semiconductor, Inc.
For More Information On This Product,
CDR MoneT FLASH EEPROM
Go to: www.freescale.com
Rev. 15 October 2000
MOTOROLA
19-2

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