MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 611

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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PRESDIV — Prescaler Divide Register
16.7.6 Prescaler Divide Register
MPC555
USER’S MANUAL
MSB
Bit(s)
13:15
0
0
RESET:
0:7
10
11
12
8
9
1
0
/
CANCTRL0
PROPSEG
MPC556
TSYNC
SAMP
Name
LBUF
2
0
PRESDIV
3
0
See
Sampling mode. The SAMP bit determines whether the TouCAN module will sample each
received bit one time or three times to determine its value.
0 = One sample, taken at the end of phase buffer segment one, is used to determine the
1 = Three samples are used to determine the value of the received bit. The samples are tak-
Reserved
Timer synchronize mode. The TSYNC bit enables the mechanism that resets the free-run-
ning timer each time a message is received in message buffer zero. This feature provides
the means to synchronize multiple TouCAN stations with a special “SYNC” message (global
network time).
0 = Timer synchronization disabled.
1 = Timer synchronization enabled.
Note: there can be a bit clock skew of four to five counts between different TouCAN modules
that are using this feature on the same network.
Lowest buffer transmitted first. The LBUF bit defines the transmit-first scheme.
0 = Message buffer with lowest ID is transmitted first.
1 = Lowest numbered buffer is transmitted first.
Reserved
Propagation segment time. PROPSEG defines the length of the propagation segment in the
bit time. The valid programmed values are zero to seven. The propagation segment time is
calculated as follows:
Propagation Segment Time = (PROPSEG + 1) Time Quanta
where
1 Time Quantum = 1 Serial Clock (S-Clock) Period
Table 16-16 CANCTRL1 Bit Descriptions
Table 16-13
value of the received bit.
en at the normal sample point and at the two preceding periods of the S-clock.
Freescale Semiconductor, Inc.
4
0
For More Information On This Product,
CAN 2.0B CONTROLLER MODULE
5
0
Go to: www.freescale.com
Rev. 15 October 2000
6
0
7
0
8
0
Description
9
0
10
0
CANCTRL2
11
0
12
0
13
0
0x30 7088
0x30 7488
MOTOROLA
14
0
16-29
LSB
15
0

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