MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 626

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

17.4 Programming Model
MPC555
USER’S MANUAL
solve down to the TPU3 IMB clock divided by eight.
pre-divider and pre-scaler control.
Table 17-4
pre-divider prescaler.
The TPU3 memory map contains three groups of registers:
All registers except the channel interrupt status register (CISR) must be read or written
by means of half-word (16-bit) or word (32-bit) accesses. The address space of the
TPU3 memory map occupies 512 bytes. Unused registers within the 512-byte address
space return zeros when read.
Table 17-5
TCR2 Value
CLOCK
DIV8
TCR2
Pin
• System configuration registers
• Channel control and status registers
• Development support and test verification registers
0b00
0b01
0b10
0b11
/
TCR2PSCK2
MPC556
is a summary of prescaler output (assuming a divide-by-one value for the
shows the TPU3 address map.
Control
MUX
TCR2PSCK2 = 0
Freescale Semiconductor, Inc.
Internal Clock Divide Ratio
Figure 17-4 TCR2 Prescaler Control
For More Information On This Product,
16
32
64
Table 17-4 TCR2 Prescaler Control
8
Clock
Source
TIME PROCESSOR UNIT 3
Go to: www.freescale.com
Rev. 15 October 2000
TCR2PSCK2 = 1
Pre-divider
Prescaler
120
24
56
8
TCR2PSCK2 = 0
Figure 17-4
PRESCALER
TCR2
1,2,4,8
External Clock Divide Ratio
1
2
4
8
illustrates the TCR2
TCR2PSCK2 = 1
TCR2
MOTOROLA
15
1
3
7
17-8