MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 43

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Freescale Semiconductor, Inc.
Page
Table
Number
Number
15-2 MBISM Address Map......................................................................................... 15-8
15-3 MIOS1TPCR Bit Descriptions............................................................................ 15-9
15-4 MIOS1VNR Bit Descriptions .............................................................................. 15-9
15-5 MIOS1MCR Bit Descriptions ........................................................................... 15-10
15-6 MBISM Interrupt Registers Address Map ........................................................ 15-10
15-7 MIOS1LVL0 Bit Descriptions ........................................................................... 15-11
15-8 MIOS1LVL1 Bit Descriptions ........................................................................... 15-11
15-9 MCPSM Address Map ..................................................................................... 15-13
15-10 MCPSMSCR Bit Descriptions........................................................................ 15-13
15-11 MMCSM Address Map................................................................................... 15-15
15-12 MMCSMCNT Bit Descriptions ....................................................................... 15-16
15-13 MMCSMML Bit Descriptions.......................................................................... 15-16
15-14 MMCSMSCR Bit Descriptions ....................................................................... 15-17
15-15 MMCSMCR CP and
MPWMSMSCR CP Values.......................................................................... 15-18
15-16 MDASM Address Map ................................................................................... 15-20
15-17 MDASMSCR Bit Descriptions........................................................................ 15-23
15-18 MDASM Mode Selects................................................................................... 15-24
15-19 MPWMSM Address Map ............................................................................... 15-26
15-20 MPWMSMPERR Bit Descriptions.................................................................. 15-27
15-21 MPWMSMPULR Bit Descriptions .................................................................. 15-27
15-22 MPWMSMCNTR Bit Descriptions.................................................................. 15-28
15-23 MPWMSMSCR Bit Descriptions .................................................................... 15-29
15-24 PWMSM Output Pin Polarity Selection.......................................................... 15-29
15-25 MPIOSM Address Map .................................................................................. 15-30
15-26 MPIOSMDR Bit Descriptions ......................................................................... 15-31
15-27 MPIOSMDDR Bit Descriptions ...................................................................... 15-31
15-28 MIRSM0 Address Map................................................................................... 15-34
15-29 MIOS1SR0 Bit Descriptions........................................................................... 15-34
15-30 MIOS1ER0 Bit Descriptions........................................................................... 15-35
15-31 MIOS1RPR0 Bit Descriptions ........................................................................ 15-36
15-32 MIRSM1 Address Map................................................................................... 15-36
15-33 MIOS1SR1 Bit Descriptions........................................................................... 15-37
15-34 MIOS1ER1 Bit Descriptions........................................................................... 15-37
15-35 MIOS1RPR1 Bit Descriptions ........................................................................ 15-38
15-36 MIOS1 Configuration ..................................................................................... 15-44
16-1 Common Extended/Standard Format Frames................................................... 16-5
16-2 Message Buffer Codes for Receive Buffers....................................................... 16-5
16-3 Message Buffer Codes for Transmit Buffers...................................................... 16-5
16-4 Extended Format Frames .................................................................................. 16-6
16-5 Standard Format Frames................................................................................... 16-6
16-6 Receive Mask Register Bit Values..................................................................... 16-8
16-7 Mask Examples for Normal/Extended Messages .............................................. 16-8
16-8 Example IMB Clock, CAN Bit Rate and S-Clock Frequencies........................... 16-9
16-9 Interrupt Levels ................................................................................................ 16-19
MPC555 / MPC556
LIST OF TABLES
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
xliii
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