MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 846

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

D.12 Period/Pulse-Width Accumulator (PPWA)
MPC555 / MPC556
USER’S MANUAL
The period/pulse-width accumulator (PPWA) algorithm accumulates a 16-bit or 24-bit
sum of either the period or the pulse width of an input signal over a programmable
number of periods or pulses (from one to 255). After an accumulation period, the algo-
rithm can generate a link to a sequential block of up to eight channels. The user spec-
ifies a starting channel of the block and number of channels within the block.
Generation of links depends on the mode of operation.
Any channel can be used to measure an accumulated number of periods of an input
signal. A maximum of 24 bits can be used for the accumulation parameter. From one
to 255 period measurements can be made and summed with the previous measure-
ment(s) before the TPU interrupts the CPU, allowing instantaneous or average fre-
quency measurement, and the latest complete accumulation (over the programmed
number of periods).
The pulse width (high-time portion) of an input signal can be measured (up to 24 bits)
and added to a previous measurement over a programmable number of periods (one
to 255). This provides an instantaneous or average pulse-width measurement capa-
bility, allowing the latest complete accumulation (over the specified number of periods)
to always be available in a parameter.
By using the output compare function in conjunction with PPWA, an output signal can
be generated that is proportional to a specified input signal. The ratio of the input and
output frequency is programmable. One or more output signals with different frequen-
cies, yet proportional and synchronized to a single input signal, can be generated on
separate channels. See Motorola TPU Progamming Note
mulator TPU Function (PPWA), (TPUPN11/D).
Figure D-21
function.
shows the host interface areas and parameter RAM for the PPWA
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
TPU ROM FUNCTIONS
Rev. 15 October 2000
Period/Pulse-Width Accu-
MOTOROLA
D-32