MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 398

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

11.8 L2U Programming Model
MPC555
USER’S MANUAL
L2U_RBA0
L2U_RBA1
L2U_RBA2
L2U_RBA3
L2U_MCR
L2U_GRA
L2U_RA0
L2U_RA1
L2U_RA2
L2U_RA3
Name
1. L-bus slave includes all address in the L-bus address space.
2. L2U indicates L2U registers.
3. U-bus/E-bus refers to all destinations through the L2U interface.
4. There will be a 1-clock turnaround because the L-bus retry information is not available in time to negate the L-
Note: X indicates don’t care conditions.
The L2U control registers control the L2U bus interface and the DMPU. They are ac-
cessible via the MPC555 / MPC556 mtspr and mfspr instructions. They are also ac-
cessible by an external master when EMCR[CONT] bit is cleared. L2U control
registers are accessible from both the L-bus side and the U-bus side in one clock cy-
cle. As with all SPRs, L2U registers are accessible in supervisor mode only.
Any unimplemented bits in L2U registers return 0’s on a read, and the writes to those
register bits are ignored.
The
addresses which are used to access L2U registers during a peripheral mode access.
bus arbitration.
Case
Table 11-5
/
1
2
3
4
5
MPC556
SPR #
568
792
793
794
795
824
825
826
827
536
U-bus/E-bus
Destination
L-bus Slave
L-bus slave
L-bus slave
L2U
SPR5:9
shows L2U registers along with their SPR numbers and hexadecimal
10001
11000
11000
11000
11000
11001
11001
11001
11001
10000
Table 11-4 L2U Show Cycle Support Chart
2
Freescale Semiconductor, Inc.
Table 11-5 L2U (PPC) Register Decode
1
3
For More Information On This Product,
L-BUS TO U-BUS INTERFACE (L2U)
SPR0:4
11000
11000
11001
11010
11011
11000
11001
11010
11011
11000
LB AACK
Yes
Yes
No
X
X
Go to: www.freescale.com
Rev. 15 October 2000
External Master
0x0000_3110
0x0000_3180
0x0000_3380
0x0000_3580
0x0000_3780
0x0000_3190
0x0000_3390
0x0000_3590
0x0000_3790
0x0000_3100
Address for
Access
LB ABORT
Yes
.
No
X
X
X
Access
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
SUPR
[Cycle will be retried one clock later]
[L-bus will be released next clock]
Not show cycled
Not show cycled
Not show cycled
Not show cycled
L2U Module Configuration Register
Region Base Address Register 0
Region Base Address Register 1
Region Base Address Register 2
Region Base Address Register 3
Comments
Show cycled
Region Attribute Register 0
Region Attribute Register 1
Region Attribute Register 2
Region Attribute Register 3
Global Region Attribute
Description
MOTOROLA
4
11-12