MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 730

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

21.5.6.4 Development Port Serial Communications — Clock Mode Selection
MPC555
USER’S MANUAL
All of the serial transmissions are clock transmissions and are therefore synchronous
communications. However, the transmission clock may be either synchronous or
asynchronous with the system clock (CLKOUT). The development port allows the user
to select two methods for clocking the serial transmissions. The first method allows the
transmission to occur without being externally synchronized with CLKOUT, in this
mode a serial clock DSCK must be supplied to the MPC555 / MPC556. The other com-
munication method requires a data to be externally synchronized with CLKOUT.
The first clock mode is called “asynchronous clock” since the input clock (DSCK) is
asynchronous with CLKOUT. To be sure that data on DSDI is sampled correctly, tran-
sitions on DSDI must occur a setup time ahead and a hold time after the rising edge
of DSCK. This clock mode allows communications with the port from a development
tool which does not have access to the CLKOUT signal or where the CLKOUT signal
has been delayed or skewed. Refer to the timing diagram in
The second clock mode is called “synchronous self clock”. It does not require an input
clock. Instead the port is timed by the system clock. The DSDI input is required to meet
setup and hold time requirements with respect to CLKOUT rising edge. The data rate
for this mode is always the same as the system clock. Refer to the timing diagram in
Figure
The selection of clock or self clock mode is made at reset. The state of the DSDI input
is latched eight clocks after SRESET negates. If it is latched low, asynchronous clock
mode is enabled. If it is latched high then synchronous self clock mode is enabled.
Since DSDI is used to select the development port clocking scheme, it is necessary to
prevent any transitions on DSDI during this time from being recognized as the start of
a serial transmission. The port will not begin scanning for the start bit of a serial trans-
mission until 16 clocks after the negation of SRESET. If DSDI is asserted 16 clocks
after SRESET negation, the port will wait until DSDI is negated to begin scanning for
the start bit.
/
MPC556
21-9.
Freescale Semiconductor, Inc.
For More Information On This Product,
DEVELOPMENT SUPPORT
Go to: www.freescale.com
Rev. 15 October 2000
Figure 21-8
MOTOROLA
21-34