MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 561

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

15.12 MIOS Pulse Width Modulation Submodule (MPWMSM)
MPC555
USER’S MANUAL
Counter
Clock
The purpose of the MIOS pulse width modulation submodule (MPWMSM) is to create
a variable pulse width output signal at a wide range of frequencies, independent of oth-
er MIOS1 output signals. The MPWMSM includes its own 8-bit prescaler and counter
and, thus, does not use the MIOS1 16-bit counter buses.
The MPWMSM pulse width can vary from 0.0% to 100.0%, with up to 16 bits of reso-
lution. The finest output resolution is the MCU IMB clock time divided by two (for a
F
teen bits of resolution and the overall prescaler divide ratio varying from divide-by-2 to
divide-by-4096, the period of the PWM output can range from 3.28 ms to 6.7 s (assum-
ing a f
reduced. The period can be as fast as 205 µs (4.882 KHz) with twelve bits of resolu-
tion, as fast as 12.8 µs (78.125 KHz) with eight bits of resolution and as fast as 3.2 µs
(312.500 KHz) with six bits of resolution (still assuming a f
stage prescaler divide-by-2 clock selection).
Refer to
SYS
/
of 40.0 MHz, the finest output pulse width resolution is 50 ns). With the full six-
MPC556
SYS
Table 15-36
of 40 MHz). By reducing the counting value, the output signal period can be
16-bit Down Counter
Next Period Register
8- bit Prescaler
PS0 - PS7
(NCOUNT)
MPWMC
MPWMA
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Freescale Semiconductor, Inc.
Figure 15-6 MPWMSM Block Diagram
for the MPWMSM relative I/O pin implementation.
= 0x0001
For More Information On This Product,
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Rev. 15 October 2000
FREN
EN
Pulse Width Register
Register MPWMB1
Next Pulse Width
<= Comparator
PWMB2
TRSP
16-bit
PWMB
Flip-Flop
Output
EN
MIOB
SYS
Output
Buffer
POL
of 40 MHz and a first
PIN
Output
Logic
DDR
MOTOROLA
Output
15-25
Pin