MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 684

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

19.8.3 Device Modes and Censorship Status
MPC555
USER’S MANUAL
There are two states of censorship: information censorship (CENSOR[0:1] = 11) and
cleared censorship (CENSOR[0:1] = 00). In the information censorship state the entire
CMF array must be erased to clear CENSOR[0:1]. In the cleared censorship or no cen-
sorship states the bits in CENSOR[0:1] may be set without modifying the information
in the CMF array. When FIC=1, the CENSOR bits have no effect upon censorship.
While the device is in uncensored mode, ACCESS may be set to allow the device to
enter censored mode and still access the CMF array. ACCESS may not be set while
the device is in censored mode but may be cleared.
The default reset state of ACCESS is zero, so that FIC and CENSOR[0:1] control the
level of censorship to the CMF EEPROM array. All accesses to the CMF EEPROM
array are allowed if ACCESS=1.
If an access is attempted when the device is in censored mode and the following con-
dition holds, the CMF EEPROM module disallows access to the array and signals a
bus error:
If CENSOR[0:1] is in the no-censorship state, however (CENSOR[0]
the CMF EEPROM module recognizes accesses to its address space.
When FIC = 1, the CENSOR bits have no effect upon censorship. If ((FIC = 1) and (AC-
CESS = 0)) the CMF is in information censorship mode. If ((FIC = 1) and (ACCESS =
1)), the CMF is in normal access mode. This arrangement aids in the development of
custom techniques for controlling the ACCESS bit without setting CENSOR[0:1] to the
information censorship state. Using FIC to force information censorship allows testing
of the hardware and software for setting ACCESS without setting CENSOR[0:1] = 11.
The default reset state of FIC is normal censorship operation (FIC = 0).
Table 19-16
the ACCESS, FIC, and CENSOR[0:1] bits.
When booting from the internal flash, the default state is #8 unless BDM was entered,
or a slave access to the MPC555 / MPC556 occurred. When any of these three con-
ditions occur, then the state of CENSOR[0:1] determine whether the flash array can
be accessed:
ACCESS
1. BDM is active
2. Accessing the MPC555 / MPC556 flash via a slave mode read
3. Booting from an external memory
0
0
0
1
/
MPC556
((CENSOR[0] = CENSOR[1])|(FIC = 1)) AND (ACCESS = 0)
summarizes the various combinations of censorship mode and states of
CENSOR[0:1]
01 or 10
XX
11
00
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 19-15 Levels of Censorship
Information censorship, No CMF array accesses allowed
No censorship, CMF array accesses allowed
Cleared censorship, No CMF array accesses allowed
No censorship, CMF array accesses allowed
CDR MoneT FLASH EEPROM
Go to: www.freescale.com
Rev. 15 October 2000
Description
≠
CENSOR[1]),
MOTOROLA
19-32