MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 90

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
Quantity:
853
Part Number:
MPC555LFMZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC555LFMZP40
Manufacturer:
MOT
Quantity:
2
Part Number:
MPC555LFMZP40R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.4.7 Special Pull Resistor Disable Control (SPRDS)
2.4.8 Pin Reset States
MPC555
USER’S MANUAL
IRQ[0]/SGPIOC[0]
For the pins that support debug and opcode-tracking functionality, the pull-up and pull-
down resistors are controlled by the SPRDS signal, which is somewhat like the encod-
ed 3-V / 5-V select. During reset this signal is used synchronously to enable the pull-
up resistors in the pads. On negation of reset, based on which functionality is selected
for the pins, this signal is set to disable the pull-up resistors or remains held in its reset
state to indicate that the pull-ups are disabled only when the output driver is enabled.
For example, if a pin is configured as a bus arbitration pin, The SPRDS signal remains
low throughout reset. This causes the pull-up to be enabled. When reset is released,
SPRDS remains low. The output enable for the driver is negated by default. When the
output driver is enabled, the pull-up is disabled.
When a pin is configured as an opcode-tracking or debug pin, SPRDS remains low
throughout reset. This causes the pull-up to be enabled. When reset is released,
SPRDS is asserted. This disables the pull-up resistor immediately. The output driver
drives the pin to the required state after reset.
Table 2-4
RSV/SGPIOC[1]
CR/SGPIOC[2]/
SGPIOA[8:31]
SGPIOD[0:31]
ADDR[8:31]/
KR, RETRY/
DATA[0:31]/
SGPIOC[3]
SGPIOC[4]
IRQ[1]/
IRQ[2]/
IRQ[3]/
IRQ[4]/
AT[2]/
MTS
/
Pin
MPC556
summarizes the reset states of all the pins on the MPC555 / MPC556.
Function
SGPIOD[0:31]
SGPIOA[8:31]
ADDR[8:31]
KR, RETRY
DATA[0:31]
SGPIOC[0]
SGPIOC[1]
SGPIOC[2]
SGPIOC[3]
SGPIOC[4]
Freescale Semiconductor, Inc.
IRQ[0]
IRQ[1]
IRQ[2]
IRQ[3]
IRQ[4]
AT[2]
RSV
MTS
For More Information On This Product,
CR
Table 2-4 Pin Reset State
Go to: www.freescale.com
SIGNAL DESCRIPTIONS
Rev. 15 October 2000
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
Port
O
O
O
I
I
I
I
I
I
USIU
Voltage
3 V
5 V
3 V
5 V
3 V
5 V
3 V
3 V
5 V
3 V
3 V
5 V
3 V
3 V
3 V
5 V
3 V
3 V
5 V
PU5 until reset negates
PU5 until PRDS is set
PD until reset negates
PD until PRDS is set
PU5 until reset negates
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
PU5 until PRDS negates
PU5 until reset negates
PU5 when driver not enabled
PU5 until PRDS is set
PU5 until reset negates
PU5 until reset negates
PU5 until PRDS is set
Reset State
1
1
1
1
1
1
1
1
1
2
MOTOROLA
2-32

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