MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 217

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555
USER’S MANUAL
IRQ[0:6]
IRQ[7:31]
IMB3 Interrupts:
If programmed to generate interrupts, the SWT and external pin IRQ[0] always gener-
ate a non-maskable interrupt (NMI) to the RCPU. Notice that the RCPU takes the sys-
tem reset interrupt when an NMI is asserted and the external interrupt for any other
interrupt asserted by the interrupt controller.
Each one of the external pins IRQ[1:7] has its own dedicated assigned priority level.
IRQ[0] is also mapped but should be used only as a status bit indicating that IRQ[0]
was asserted and generated an NMI interrupt. There are eight additional interrupt pri-
Interrupt
Levels
32
IMB3
→Level 0:6
IRQ[0:7]
UIMB
→Level 7
/
MPC556
Figure 6-4 MPC555 / MPC556 Interrupt Structure
SIU
Detect
Freescale Semiconductor, Inc.
Edge
SYSTEM CONFIGURATION AND PROTECTION
For More Information On This Product,
Change of Lock
Go to: www.freescale.com
Debug
DEC
RTC
PIT
Rev. 15 October 2000
TB
8
8
8
8
8
SWT
Level 7
Level 6
Level 5
Level 4
Level 3
Level 2
Level 1
Level 0
IRQ0
I7
I6
I5
I4
I3
I2
I1
I0
Generate
NMI
DEC
IREQ
Debug
IRQOUT
MOTOROLA
RCPU
NMI
6-9