MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 455

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

13.12.11 Conversion Command Word Table
MPC555
USER’S MANUAL
Bit(s)
10:15
0:1
2:7
8:9
The CCW table is a RAM, 64 words long and 10 bits wide, which can be programmed
by the software to request conversions of one or more analog input channels. The en-
tries in the CCW table are 10-bit conversion command words. The CCW table is writ-
ten by software and is not modified by the QADC64. Each CCW requests the
conversion of an analog channel to a digital result. The CCW specifies the analog
channel number, the input sample time, and whether the queue is to pause after the
current CCW.
The ten implemented bits of the CCW word are read/write data. They may be written
when the software initializes the QADC64. Unimplemented bits are read as zeros, and
write operations have no effect. Each location in the CCW table corresponds to a lo-
cation in the result word table. When a conversion is completed for a CCW entry, the
10-bit result is written in the corresponding result word entry. The QADC64 provides
64 CCW table entries.
The beginning of queue 1 is always the first location in the CCW table. The first loca-
tion of queue 2 is specified by the beginning of queue 2 pointer (BQ2) in QACR2. To
dedicate the entire CCW table to queue 1, software must do the following:
To dedicate the entire CCW table to queue 2, software must do the following:
• Program queue 2 to be in the disabled mode, and
• Program the beginning of BQ2 to ≥ 64.
• Program queue 1 to be in the disabled mode
• Program BQ2 to be the first location in the CCW table.
/
CWPQ1
CWPQ2
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Name
—
—
Reserved
Command word pointer for queue 1. This field is a software read-only field, and write operations
have no effect. CWPQ1 allows software to read the last executed CCW in queue 1, regardless
which queue is active. The CWPQ1 field is a CCW word pointer with a valid range of 0 to 63.
In contrast to CWP, CPWQ1 is updated when the conversion result is written. When the QADC64
finishes a conversion in queue 1, both the result register is written and the CWPQ1 are updated.
Finally, when queue 1 operation is terminated after a CCW is read that is defined as BQ2, CWP
points to BQ2 while CWPQ1 points to the last CCW queue 1.
During the stop mode, the CWPQ1 is reset to 63, since the control registers and the analog logic
are reset. When the freeze mode is entered, the CWPQ1 is unchanged; it points to the last exe-
cuted CCW in queue 1.
Reserved
Command word pointer for queue 2. This field is a software read-only field, and write operations
have no effect. CWPQ2 allows software to read the last executed CCW in queue 2, regardless
which queue is active. The CWPQ2 field is a CCW word pointer with a valid range of 0 to 63.
In contrast to CWP, CPWQ2 is updated when the conversion result is written. When the QADC64
finishes a conversion in queue 2, both the result register is written and the CWPQ2 are updated.
During the stop mode, the CWPQ2 is reset to 63, since the control registers and the analog logic
are reset. When the freeze mode is entered, the CWP is unchanged; it points to the last executed
CCW in queue 2.
Freescale Semiconductor, Inc.
Table 13-18 QASR0 Bit Descriptions
For More Information On This Product,
Go to: www.freescale.com
Rev. 15 October 2000
Description
MOTOROLA
13-43