MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 211

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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6.1 System Configuration
6.1.1 USIU Pins Multiplexing
6.1.2 Memory Mapping
MPC555
USER’S MANUAL
The SIU allows the user to configure the system according to the particular require-
ments. The functions include control of show cycle operation, pin multiplexing, and in-
ternal memory map location. System configuration also includes a register containing
part and mask number constants to identify the part in software.
System configuration registers include the system configuration register (SIUMCR),
the internal memory mapping register (IMMR). Refer to
and Protection Registers
Some of the functions defined in the various sections of the SIU (external bus inter-
face, memory controller, and general-purpose I/O) share pins.
how the pin functions of these multiplexed pins are assigned.
The MPC555 / MPC556 internal memory space can be assigned to one of eight loca-
tions.
The internal memory map is organized as a single 4-Mbyte block. The user can assign
this block to one of eight locations by programming the ISB field in the internal memory
IRQ3/KR/RETRY/SGPIOC3
SGPIOC7/IRQ_OUT/LWP0
ADDR[8:31]/SGPIOA[8:31]
DATA[0:31]/SGPIOD[0:31]
IRQ5/SGPIOC5/MODCK1
IRQ2/CR/SGPIOC2/MTS
WE(0:3)/BE(0:3)/AT(0:3)
IRQ1/RSV/SGPIOC1
IRQ4/AT2/SGPIOC4
SGPIOC6/FRZ/PTR
IWP[0:1]/VFLS[0:1]
RSTCONF/TEXP
IRQ0/SGPIOC0
/
IRQ6/MODCK2
IRQ7/MODCK3
BG/VF0/LWP1
BR/VF1/IWP2
BB/VF2/IWP3
MPC556
TDO/DSDO
TCK/DSCK
Pin Name
TDI/DSDI
BI/STS
Table 6-1 USIU Pins Multiplexing Control
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
For More Information On This Product,
for register diagrams and bit descriptions.
Go to: www.freescale.com
Programmed in the SIUMCR and via the hard reset configuration.
Rev. 15 October 2000
(See
(See
Programmed in SIUMCR and hard reset configuration.
(See
(See
6.13.1.1 SIU Module Configuration Register
6.13.1.1 SIU Module Configuration Register
6.13.1.1 SIU Module Configuration
6.13.1.1 SIU Module Configuration
7.5.2 Hard Reset Configuration
7.5.2 Hard Reset Configuration
Otherwise: programmed in SIUMCR.
Otherwise: programmed in SIUMCR
.
At Power-on reset: MODCK[1:3]
At Power-on reset: RSTCONF
Multiplexing Controlled By:
6.13 System Configuration
Table 6-1
Word.)
Word.)
Register.)
Register.)
and
and
summarizes
MOTOROLA
6-3

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