MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 235

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

6.13.3 System Protection Registers
6.13.3.1 System Protection Control Register (SYPCR)
MPC555
USER’S MANUAL
SYPCR — System Protection Control Register
Bit(s)
16:23
25:27
MSB
0:15
16
16
24
28
29
0
0
1
1
RESET:
RESET:
RESET:
The system protection control register (SYPCR) controls the system monitors, the
software watchdog period, and the bus monitor timing. This register can be read at any
time, but can be written only once after system reset.
17
17
/
0
1
1
1
SWTC
MPC556
Name
SWF
SWE
BMT
BME
—
18
18
0
2
1
1
Software watchdog timer count. This field contains the count value of the software watchdog tim-
er.
Bus monitor timing. This field specifies the time-out period, in eight-system-clock resolution, of
the bus monitor.
Bus monitor enable
0 = Disable bus monitor
1 = Enable bus monitor
Reserved
Software watchdog freeze
0 = Software watchdog continues to run while FREEZE is asserted
1 = Software watchdog stops while FREEZE is asserted
Software watchdog enable. Software should clear this bit after a system reset to disable the
SWT.
0 = Watchdog is disabled
1 = Watchdog is enabled
19
19
0
3
1
1
BMT
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
20
20
0
4
1
1
Table 6-13 SYPCR Bit Descriptions
For More Information On This Product,
21
21
0
5
1
1
Go to: www.freescale.com
Rev. 15 October 2000
22
22
0
6
1
1
RESERVED
23
23
0
7
1
1
SWTC
BME
24
24
0
8
1
0
Description
25
25
0
9
1
0
RESERVED
26
10
26
0
1
0
27
11
27
0
1
0
SWF
28
12
28
0
1
0
SWE
29
13
29
0
1
1
0x2F C004
MOTOROLA
SWRI
30
14
30
0
1
1
SWP
LSB
LSB
31
15
31
6-27
0
1
1