MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 240

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

TBSCR — Time Base Control and Status Register
6.13.4.5 Real-Time Clock Status and Control Register
MPC555
USER’S MANUAL
RTCSC — Real-Time Clock Status and Control Register
MSB
Bit(s)
10:11
PORESET:
MSB
0
0
0:7
12
13
14
15
0
0
8
9
RESET:
The RTCSC is used to enable the different RTC functions and to report the source of
the interrupts. The register can be read anytime. A status bit is cleared by writing it to
a one. (Writing a zero does not affect a status bit’s value.) More than one status bit can
be cleared at a time. This register is locked after RESET. Unlocking is accomplished
by writing 0x55CCAA33 to its associated key register. See
Registers Lock
1
0
/
1
0
REFAE
REFBE
TBIRQ
MPC556
Name
REFA
REFB
TBE
TBF
—
2
0
2
0
Time base interrupt request. These bits determine the interrupt priority level of the time base. Re-
fer to
Reference A (TBREF0) interrupt status.
0 = No match detected
1 = TBREF0 value matches value in TBL
Reference B (TBREF1) interupt status.
0 = No match detected
1 = TBREF1 value matches value in TBL
Reserved
Reference A (TBREF0) interrupt enable. If this bit is set, the time base generates an interrupt
when the REFA bit is set.
Reference B (TBREF1) interrupt enable. If this bit is set, the time base generates an interrupt
when the REFB bit is set.
Time base freeze. If this bit is set, the time base and decrementer stop while FREEZE is assert-
ed.
Time base enable
0 = Time base and decrementer are disabled
1 = Time base and decrementer are enabled
3
0
3
0
TBIRQ
RTCIRQ
Mechanism.
6.4 Interrupt Controller
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
4
0
4
0
Table 6-16 TBSCR Bit Descriptions
For More Information On This Product,
5
0
5
0
Go to: www.freescale.com
Rev. 15 October 2000
6
0
6
0
for interrupt level encodings.
7
0
7
0
REFA REFB
SEC
8
0
8
0
Description
ALR
9
0
9
0
served
RESERVED
10
Re-
0
10
0
11
8.9.3.2 Keep Alive Power
0
4M
11
—
REFAE REFBE
SIE
12
12
0
0
ALE
13
13
0
0
0x2F C200
0x2F C220
MOTOROLA
RTF
14
TBF
0
14
0
LSB
RTE
TBE
15
LSB
—
6-32
15
0