MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 645

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

18.3.1 DPTRAM Module Configuration Register (DPTMCR)
MPC555
USER’S MANUAL
Supv R/W
Test
Supv R/W
Supv Read Only
Supv Read Only
Supv Read Only
dress Map
map.
The DPTRAM array occupies the 6-Kbyte block. In the MPC555 / MPC556, the array
must be located at the address 0x30 2000. Refer to
This register defines the basic configuration of the DPTRAM module. The DPTMCR
contains bits to configure the DPT RAM module for stop operation and for proper ac-
cess rights to the array. The register also contains the MISC control bits.
Access
R/W
/
MPC556
to locate the DPTRAM control block in the MPC555 / MPC556 address
0x30 0000
0x30 0002
0x30 0004
0x30 0006
0x30 0008
0x30 000A
Address
Freescale Semiconductor, Inc.
0x30 37FF
0x30 2000
For More Information On This Product,
Figure 18-2 DPTRAM Memory Map
Table 18-1 DPTRAM Register Map
DPT RAM Module Configuration Register (DPTRMCR)
See
Test Configuration Register (DPTTCR)
RAM Base Address Register (RAMBAR)
See
Multiple Input Signature Register High (MISRH)
See
for bit descriptions.
Multiple Input Signature Register Low (MISRL)
See
for bit descriptions.
Multiple Input Signature Counter (MISCNT)
See
DUAL-PORT TPU RAM (DPTRAM)
Table 18-2
Table 18-3
18.3.4 MISR High (MISRH) and MISR Low (MISRL)
18.3.4 MISR High (MISRH) and MISR Low (MISRL)
18.3.5 MISC Counter (MISCNT)
Go to: www.freescale.com
Rev. 15 October 2000
DPTRAM Array
(6 Kbytes)
for bit descriptions.
for bit descriptions.
Register
Figure 1-3
for bit descriptions.
and
Figure
Last memory
Reset Value
address
0x0100
0x0000
0x0001
0x0000
0x0000
MOTOROLA
18-2.
18-3