MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 594

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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16.4.3 Transmit Process
MPC555
USER’S MANUAL
The transmit process includes preparation of a message buffer for transmission, as
well as the internal steps performed by the TouCAN to decide which message to trans-
mit. For the user, this involves loading the message and ID to be transmitted into a
message buffer and then activating that buffer as an active transmit buffer. Once this
is done, the TouCAN performs all additional steps necessary to transmit the message
onto the CAN bus.
The user should prepare or change a message buffer for transmission by executing
the following steps.
Once an active transmit code is written to a transmit message buffer, that buffer begins
participating in an internal arbitration process as soon as the receiver senses that the
CAN bus is free, or at the inter-frame space. If there are multiple messages awaiting
transmission, this internal arbitration process selects the message buffer from which
the next frame is transmitted.
3. Initialize mask registers for acceptance mask as needed
4. Initialize TouCAN interrupt handler
5. Negate the HALT bit in the module configuration register
1. Write the control/status word to hold the transmit buffer inactive (code =
2. Write the ID_HIGH and ID_LOW words
3. Write the data bytes
4. Write the control/status word (active Tx code, Tx length)
/
MPC556
a. The control/status word of all message buffers must be written either as
b. All other entries in each message buffer should be initialized as required
a. Initialize the interrupt configuration register (CANICR) with a specific
b. Set the required mask bits in the IMASK register (for all message buffer
a. At this point, the TouCAN attempts to synchronize with the CAN bus
0b1000)
an active or inactive message buffer.
request level
interrupts), in CANCTRL0 (for bus off and error interrupts), and in
CANMCR for the WAKE interrupt
In both the transmit and receive processes, the first action in prepar-
ing a message buffer must be to deactivate the buffer by setting its
code field to the proper value. This step is mandatory to ensure data
coherency.
Steps one and four are mandatory to ensure data coherency.
Freescale Semiconductor, Inc.
For More Information On This Product,
CAN 2.0B CONTROLLER MODULE
Go to: www.freescale.com
Rev. 15 October 2000
NOTE
NOTE
MOTOROLA
16-12

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