MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 691

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

19.10 Reset Operation
19.10.1 Master Reset
19.10.2 Soft Reset
MPC555
USER’S MANUAL
bias drop across D1. Capacitor C1 filters transients, while R2 provides a discharge
bleed path for C1. Allow for RC charge and discharge time constants when applying
and removing power. When using this circuit, keep leakage from external devices con-
nected to the VPP pin low, to minimize diode voltage drop.
The MPC555 / MPC556 signals a master reset (both PORESET or HRESET) to the
CMF EEPROM when a full reset is required. A master reset is the highest priority op-
eration for the CMF EEPROM and will terminate all other operations. The CMF EE-
PROM module uses master reset to initialize all register bits to their reset values. If the
CMF EEPROM is in program or erase operation (EHV = 1) and a master reset is gen-
erated, the module will perform the needed interlocks to disable the high voltage with-
out damage to the high voltage circuits. Master reset will terminate any other mode of
operation and force the CMF EEPROM BIU to a state ready to receive U-bus accesses
within 10 clocks of the end of master reset.
If the HC bit of the reset configuration word = 0 and the SIU requests internal configu-
ration during reset, the CMF EEPROM will provide the reset configuration word to the
device from CMFRC.
A soft reset forces the BIU into a state ready to receive U-bus accesses and clear the
EHV bit. All other register bits remain unaltered by a soft reset.
/
MPC556
*The VPP voltage specification is the voltage at the VPP pin,
VDDL
not the input to diode D1.
Freescale Semiconductor, Inc.
Figure 19-10 VPP Conditioning Circuit
For More Information On This Product,
CDR MoneT FLASH EEPROM
Go to: www.freescale.com
Rev. 15 October 2000
22KΩ
PROGRAMMING VOLTAGE
D
R
2
2
POWER SUPPLY*
0.1µF
D
C
1
1
V
PP
Pin
MOTOROLA
19-39