MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 473

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

PORTQS — Port QS Data Register
PQSPAR — PORTQS Pin Assignment Register
14.6.2 PORTQS Pin Assignment Register (PQSPAR)
MPC555
USER’S MANUAL
RESET:
RESET:
MSB
MSB
0
0
0
0
0
PQSPAR determines which of the QSPI pins, with the exception of the SCK pin, are
used by the QSPI submodule, and which pins are available for general-purpose I/O.
Pins may be assigned on a pin-by-pin basis. If the QSPI is disabled, the SCK pin is
automatically assigned its general-purpose I/O function (QGPIO6).
QSPI pins designated by PQSPAR as general-purpose I/O pins are controlled only by
PQSDDR and PQSPDR; the QSPI has no effect on these pins. PQSPAR does not af-
fect the operation of the SCI submodule.
Table 14-9
*See bit descriptions in
QPAP
RESERVED
CS3
/
1
0
1
0
MPC556
QPAP
CS2
2
0
2
0
summarizes the QSMCM pin functions.
QPAP
CS1
3
0
3
0
Table
Freescale Semiconductor, Inc.
QDRX
QPAP
CS0
QUEUED SERIAL MULTI-CHANNEL MODULE
D2
4
0
4
0
For More Information On This Product,
14-11.
Table 14-9 QSMCM Pin Functions
PORTQS Function
QDTX
D2
5
1
5
0
0
QGPIO6
QGPIO5
QGPIO4
QGPIO3
QGPIO2
QGPIO1
QGPIO0
QGPO2
QGPO1
QGPI2
QGPI1
Go to: www.freescale.com
QDRX
Rev. 15 October 2000
QPA-
MOSI
D1
6
0
6
0
QPAM
QDTX
ISO
D1
7
1
7
0
QSMCM Function
8
0
0
8
PCS[3]
PCS[2]
PCS[1]
PCS[0]
RXD2
RXD1
QDPC
TXD2
TXD1
MOSI
MISO
SCK
S3
9
0
9
QDPC
S2
10
10
0
QDPC
S1
11
11
0
DDRQS*
QDPC
12
S0
12
0
SCK
QD-
13
13
0
0x30 5014
0x30 5016
MOTOROLA
MOSI
QD-
14
14
0
14-11
QDMI-
LSB
LSB
SO
15
15
0