MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 425

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

13.9.1.1 Amplifier Bypass Mode Conversion Timing
MPC555
USER’S MANUAL
If the amplifier bypass mode is enabled for a conversion by setting the amplifier bypass
(BYP) bit in the CCW, the timing changes to that shown in
sample time is eliminated, reducing the potential conversion time by two QCLKs. How-
ever, due to internal RC effects, a minimum final sample time of four QCLKs must be
allowed. This results in no savings of QCLKs. When using the bypass mode, the ex-
ternal circuit should be of low source impedance, typically less than 10 kΩ. Also, the
loading effects of the external circuitry by the QADC64 need to be considered, since
the benefits of the sample amplifier are not present.
QCLK
/
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
QCLK
Because of internal RC time constants, a sample time of two QCKLs
in bypass mode for high frequency operation is not recommended.
2 CYCLES
SAMPLE
BUFFER
TIME
SAMPLE TIME
Figure 13-6 Bypass Mode Conversion Timing
N CYCLES:
(2, 4, 8, 16)
SAMPLE
SAMPLE
TIME
TIME
FINAL SAMPLE
Freescale Semiconductor, Inc.
N CYCLES:
(2, 4, 8, 16)
For More Information On This Product,
TIME
Figure 13-5 Conversion Timing
SUCCESSIVE APPROXIMATION RESOLUTION
Go to: www.freescale.com
Rev. 15 October 2000
SUCCESSIVE APPROXIMATION RESOLUTION
RESOLUTION
NOTE
SEQUENCE
10 CYCLES
TIME
SEQUENCE
RESOLUTION
10 CYCLES
TIME
Figure
13-6. The buffered
MOTOROLA
13-13