MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 281

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

8.9.2.3 VDDSYN, VSSSYN
8.9.2.4 KAPWR
8.9.2.5 VDDA, VSSA
8.9.2.6 VPP
8.9.2.7 VDDF, VSSF
8.9.2.8 VDDH
8.9.2.9 VDDSRAM
8.9.2.10 VSS
MPC555
USER’S MANUAL
The charge pump and the VCO of the SPLL are fed by a separate 3.3-V power supply
(VDDSYN) in order to improve noise immunity and achieve a high stability in its output
frequency. VSSSYN provides an isolated ground reference for the PLL.
The oscillator, time base counter, decrementer, periodic interrupt timer and the real-
time clock are fed by the KAPWR rail. This allows the external power supply unit to
disconnect all other sub-units of the MCU in low-power deep-sleep mode. The TEXP
pin (fed by the same rail) can be used by the external power supply unit to switch be-
tween sources. The IRQ[6:7]/MODCK[2:3], IRQ[5]/MODCK1, XTAL, EXTAL, EXT-
CLK, PORESET, HRESET, SRESET, and RSTCONF/TEXP input pins are powered
by KAPWR. Circuits, including pull-up resisters, driving these inputs should be pow-
ered by KAPWR.
VDDA supplies power to the analog subsystems of the QADC_A and QADC_B mod-
ules; it is nominally 5.0 V. VDDA is the ground reference for the analog subsystems.
VPP supplies the programming and erase voltage for the CMF flash modules. It is
nominally 5.0 V for program or erase operations and can be lowered to a nominal 3.3
V for read operations.
VDDF provides internal power to the CMF flash module; it should be a nominal 3.3 V.
VSSF provides an isolated ground for the CMF flash module.
VDDH provides power for the 5-V I/O operations. It is a nominal 5.0 V.
VDDSRAM supplies power to the 26-Kbyte SRAM module and the DPTRAM. It can
be used to keep the contents on the SRAM stable while the rest of the MPC555 /
MPC556 is powered down for standby operation.
VSS provides the ground reference for the MPC555 / MPC556.
/
MPC556
Freescale Semiconductor, Inc.
For More Information On This Product,
CLOCKS AND POWER CONTROL
Go to: www.freescale.com
Rev. 15 October 2000
MOTOROLA
8-21