R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1015

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
27
26
25 to 12 
11 to 0
Bit Name
TFE
TWBI
TFS[11:0] All 0
Initial
Value
0
0
All 0
R/W
R/W
R/W
R/W
R
Description
Transmit Frame Error Occurrence
Indicates that an error occurred in the transmit frame.
0: The TFS11 to TFS0 bits are all 0
1: One of the TFS11 to TFS0 bits is 1
The TFS8 to TFS0 bits can be masked for each factor by
using TRSCER. TheTFS11 to TFS9 bits cannot be
masked.
This bit is set by the E-DMAC write-back operation.
Write-Back Completion Interrupt Notification
0: Does not notify of a write-back completion interrupt
1: After a write-back operation to this descriptor is
This bit is valid only for the descriptor including the end of
transmit frame (TFP = 01 or 11). This bit is cleared to 0 by
the E-DMAC write-back operation.
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit Frame Status
These bits indicate the status of the corresponding frame.
A bit below, which is set by the E-DMAC write-back
operation, indicates the occurrence of the corresponding
event when set to 1.
•
•
•
•
complete, this bit sets the TWB1 and TWB0 bits in
EESR to 11 and notifies the CPU of a write-back
completion interrupt.
TFS[11:10]: Reserved (The write value should always
be 0.)
TFS[9]: Transmit FIFO underflow (Corresponding to
the TUC bit in EESR)
TFS[8]: Detection of transmission abort
(Corresponding to the TABT bit in EESR)
TFS[7:0]: Reserved (The write value should always be
0.)
Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 2.00 May 22, 2009 Page 945 of 1982
REJ09B0256-0200