R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 605

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(3)
Access within the size of 4-byte.
Burst I/O transfers are not supported.
The PCI I/O address space is allocated from H'FD20 0000 to H'FE3F FFFF (2 Mbytes).
Address translation from SuperHyway bus to PCI local bus
The lower 15 bits ([17:3]) of a SuperHyway bus address are sent without translation.
Bits 20 to 18 of a SuperHyway bus address are controlled by the PCI I/O bank mask register
(PCIIOBMR).
Note: In the following item and figure, “SH” means the SuperHyway bus of this LSI and “PCI”
• PCIIOMR0 [20:18] B'111: PCI address [20:18] = SH address [20:18]
• PCIIOMR0 [20:18] B'011: PCI address [20:18] = PCIIOBR [20], SH address [19:18]
• PCIIOMR0 [20:18] B'001: PCI address [20:18] = PCIIOBR [20:19], SH address [18]
• PCIIOMR0 [20:18] B'000: PCI address [20:18] = PCIIOBR [20:18]
The upper 11 bits ([31:21]) of a SuperHyway bus address are replaced with bits 31 to 21 in the
PCI I/O bank register (PCIIOBR).
Accessing PCI I/O Space
SH address
PCIIOBMR
means the PCI local bus.
Figure 13.6 SuperHyway Bus to PCI Local Bus Address Translation (PCI I/O)
31
11111110001
31
21 20 18 17
21 20 18 17
IOBAM
mask
0
0
PCI address
PCIIOBR
Rev. 2.00 May 22, 2009 Page 535 of 1982
31
31
Section 13 PCI Controller (PCIC)
29 28
29 28
PIOSBA
18 17
18 17
REJ09B0256-0200
0
0

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