R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1223

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

28.4
28.4.1
The SCIF can carry out serial communication in asynchronous mode, in which synchronization is
achieved character by character and in synchronous mode, in which synchronization is achieved
with clock pulses. For details on asynchronous mode, see section 28.4.2, Operation in
Asynchronous Mode.
16-stage FIFO buffers are provided for both transmission and reception, reducing the CPU
overhead, and enabling fast and continuous communication to be performed.
The serial transfer format is selected using SCSMR, as shown in Table 28.6. The SCIF clock
source is determined by the combination of the C/A bit in SCSMR and the CKE1 and CKE0 bits
in SCSCR, as shown in Table 28.7.
Asynchronous Mode:
• Data length: Choice of 7 or 8 bits
• Choice of parity addition and addition of 1 or 2 stop bits (the combination of these parameters
• Detection of framing errors, parity errors, receive-FIFO-data-full state, overrun errors, receive-
• Indication of the number of data bytes stored in the transmit and receive FIFO registers
• Choice of peripheral clock 0 (Pck0) or external clock (SCIF_SCK) as SCIF clock source
determines the transfer format and character length)
data-ready state, and breaks, during reception
When peripheral clock 0 (Pck0) is selected:
When external clock (SCIF_SCK) is selected: A clock with a frequency of 16 times the bit
Operation
Overview
Section 28 Serial Communication Interface with FIFO/IrDA Interface (SCIF/IrDA)
The SCIF operates on the baud rate generator
clock and can output a clock with frequency of
16 times the bit rate.
rate must be input (the on-chip baud rate
generator is not used).
Rev. 2.00 May 22, 2009 Page 1153 of 1982
REJ09B0256-0200