R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1102

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 26 I
Rev. 2.00 May 22, 2009 Page 1032 of 1982
REJ09B0256-0200
Bit
0
Bit Name
FNA
2
C Bus Interface (IIC)
Initial Value
0
R/W
R/W
Description
Forced Non Acknowledgement
In the slave receive mode, the level of this bit is
sent to the transmitting device as the
acknowledge signal. This bit is set to 0 during the
period that the data packet is being received, and
set to 1 on completion of data reception.
Forced non acknowledgement is returned to the
master during slave reception.
When the slave has received the last byte of data
in a data packet, the slave communicates with
the master by sending a nack, meaning that the
acknowledgement is not driven. The master
issues a stop on the bus after receiving a nack.
The setting of this bit does not affect the
acknowledgement of the slave address.