R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1471

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
33.3.4
HACPCML is a 32-bit read/write data register used for accessing the left channel of the codec in
digital audio recording or stream playback. To transmit the PCM playback left channel data to the
codec, write the data to HACPCML. To receive the PCM record left channel data from the codec,
read HACPCML. The data is left justified to accommodate a codec with ADC/DAC resolution of
20 bits or less.
In 16-bit packed DMA mode, HACPCML is defined as follows:
Initial value:
Initial value:
Initial value:
Initial value:
Bit
31 to 20
19 to 0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
PCM Left Channel Register (HACPCML)
Bit Name
D[19: 0]
R/W
R/W
R/W
31
15
31
15
R
0
0
0
0
R/W
R/W
R/W
30
14
30
14
R
0
0
0
0
R/W
R/W
R/W
29
13
29
13
R
0
0
0
0
Initial
Value
All 0
All 0
R/W
R/W
R/W
28
12
28
12
R
0
0
0
0
R/W
R/W
R/W
R/W
R
R/W
27
11
27
11
R
0
0
0
0
R/W
R/W
R/W
26
10
26
10
R
0
0
0
0
Description
Reserved
Always 0 for read and write.
Data 19 to 0
Write the PCM playback left channel data to these bits.
The HAC then transmits the data to the codec on an
on-demand basis.
Read these bits to get the PCM record left channel data
from the codec.
R/W
R/W
R/W
25
25
R
0
9
0
0
9
0
R/W
R/W
R/W
RD[15:0]
24
24
LD[15:0]
R
0
8
0
0
8
0
D[15:0]
R/W
R/W
R/W
23
23
R
0
7
0
0
7
0
Rev. 2.00 May 22, 2009 Page 1401 of 1982
R/W
R/W
R/W
22
22
Section 33 Audio Codec Interface (HAC)
R
0
6
0
0
6
0
R/W
R/W
R/W
21
21
R
0
5
0
0
5
0
R/W
R/W
R/W
20
20
R
0
4
0
0
0
4
R/W
R/W
R/W
R/W
19
19
0
3
0
0
3
0
REJ09B0256-0200
R/W
R/W
R/W
R/W
18
18
D[19:16]
0
2
0
0
2
0
R/W
R/W
R/W
R/W
17
17
0
1
0
0
1
0
R/W
R/W
R/W
R/W
16
16
0
0
0
0
0
0

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