R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 30

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

31.4 Operation ......................................................................................................................... 1328
31.5 Operations when Using DMAC....................................................................................... 1353
31.6 MMCIF Interrupt Sources................................................................................................ 1359
31.7 Procedure to Apply the Card Detection Function ............................................................ 1360
Section 32 PC Card Controller (PCC)............................................................. 1361
32.1 Features............................................................................................................................ 1361
32.2 Input/Output Pins............................................................................................................. 1366
32.3 Register Descriptions....................................................................................................... 1367
32.4 Operation ......................................................................................................................... 1382
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31.3.3 Transfer Byte Number Count Register (TBCR) ................................................. 1299
31.3.4 Transfer Block Number Counter (TBNCR)........................................................ 1300
31.3.5 Command Registers 0 to 5 (CMDR0 to CMDR5).............................................. 1300
31.3.6 Response Registers 0 to 16, D (RSPR0 to RSPR16, RSPRD)............................ 1302
31.3.7 Command Start Register (CMDSTRT) .............................................................. 1304
31.3.8 Operation Control Register (OPCR)................................................................... 1306
31.3.9 Command Timeout Control Register (CTOCR) ................................................. 1308
31.3.10 Data Timeout Register (DTOUTR) .................................................................... 1309
31.3.11 Card Status Register (CSTR).............................................................................. 1310
31.3.12 Interrupt Control Registers 0 and 1 (INTCR0, INTCR1) ................................... 1312
31.3.13 Interrupt Status Registers 0 and 1 (INTSTR0, INTSTR1).................................. 1314
31.3.14 Transfer Clock Control Register (CLKON)........................................................ 1318
31.3.15 VDD/Open-Drain Control Register (VDCNT)................................................... 1319
31.3.16 Data Register (DR) ............................................................................................. 1320
31.3.17 FIFO Pointer Clear Register (FIFOCLR) ........................................................... 1320
31.3.18 DMA Control Register (DMACR) ..................................................................... 1321
31.3.19 Interrupt Control Register 2 (INTCR2) .............................................................. 1322
31.3.20 Interrupt Status Register 2 (INTSTR2)............................................................... 1323
31.3.21 Card Switch Register (CSWR) ........................................................................... 1324
31.3.22 Switch Status Register (SWSR).......................................................................... 1325
31.3.23 Chattering Elimination Pulse Setting Register (CHATR) .................................. 1326
31.4.1 Operations in MMC Mode.................................................................................. 1328
31.5.1 Operation in Read Sequence............................................................................... 1353
31.5.2 Operation in Write Sequence .............................................................................. 1356
32.1.1 PCMCIA Support ............................................................................................... 1362
32.3.1 Area 6 Interface Status Register (PCC0ISR) ...................................................... 1368
32.3.2 Area 6 General Control Register (PCC0GCR) ................................................... 1371
32.3.3 Area 6 Card Status Change Register (PCC0CSCR) ........................................... 1374
32.3.4 Area 6 Card Status Change Interrupt Enable Register (PCC0CSCIER)............. 1378
32.4.1 PC card Connection Specification (Interface Diagram, Pin Correspondence).... 1382