R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 407

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
31
30 to 27 
26
25
Bit Name
ENDIAN
DPUP

Initial
Value
Undefined R
All 0
0
0
R/W
R
R/W
R
Description
Endian Flag
The value of the external pin (MD5) designating the
endian mode is sampled at a power-on reset by the
PRESET pin. This bit determines the endian mode of all
spaces.
0: Indicates that the external pin (MD5) designating the
1: Indicates that the external pin (MD5) designating the
Reserved
These bits are always read as 0. The write value should
always be 0.
Data Pin Pull-Up Resistor Control
Specifies the pull-up resistor state of the data pins (D31
to D0). This bit is initialized by a power-on reset. The
pins are not pulled up when access is performed or
when the bus is released, even if the pull-up resistor is
on. Also, in standby mode, pins D31 to D16 are not
pulled up regardless of the setting.
0: Cycles in which the pull-up resistors of the data pins
1: Pull-up resistor is off for data pins (D31 to D0).
Note: * We recommend that a pull-up resistor be
Reserved
This bit is always read as 0. The write value should
always be 0.
endian mode is low at a power-on reset and big-
endian mode is specified for this LSI.
endian mode is high at a power-on reset and little-
endian mode is specified for this LSI.
(D31 to D0) are turned on are inserted before and
after a memory access.*
externally connected to the data pins if it is
required.
Section 11 Local Bus State Controller (LBSC)
Rev. 2.00 May 22, 2009 Page 337 of 1982
REJ09B0256-0200