R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 311

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.3
Table 9.3 shows the INTC register configuration. These registers maintain software interfaces
with the CPU (SH-4A) and are initialized by a power-on reset and a manual reset.
Table 9.3 shows the INTC register configuration. Table 9.4 shows the register states in each
operating mode.
Table 9.3
Pin Name
IRQ7/IRL7 to
IRQ4/IRL4
IRQOUT
PINT15 to PINT0
Name
Interrupt control register 0
Interrupt control register 1
Interrupt priority register
Interrupt source register
Interrupt mask register 0
Interrupt mask register 1
Interrupt mask register 2
Interrupt mask clear register 0 INTMSKCLR0
Interrupt mask clear register 1 INTMSKCLR1
Interrupt mask clear register 2 INTMSKCLR2
Register Descriptions
INTC Register Configuration
Port interrupt input pins
Function
External interrupt input pin Input
Interrupt request output
Abbreviation
ICR0
ICR1
INTPRI
INTREQ
INTMSK0
INTMSK1
INTMSK2
R/W
R/W
R/W
R/W
R/(W) H'FFD0 0024
R/W
R/W
R/W
R/W
R/W
R/W
I/O
Output
Input
H'FFD0 0010
H'FFD0 0064
H'FFD0 0068
H'FFD4 0084
P4 Address
H'FFD0 0000
H'FFD0 001C
H'FFD0 0044
H'FFD0 0048
H'FFD4 0080
Rev. 2.00 May 22, 2009 Page 241 of 1982
Description
Interrupt request signal input
IRL [7:4] 4-bit level-encoded
interrupt input when ICR0.IRLM1 = 0
IRQ7 to IRQ4 individual interrupt
input when ICR0.IRLM1 = 1
Notifies that an interrupt request has
generated
This pin is asserted even if the CPU
does not accept the interrupt
request, but not asserted when the
interrupt is masked.
Port interrupt request signal input
Section 9 Interrupt Controller (INTC)
Area 7
Address
H'1FD0 0000
H'1FD0 001C
H'1FD0 0010
H'1FD0 0024
H'1FD0 0044
H'1FD0 0048
H'1FD4 0080
H'1FD0 0064
H'1FD0 0068
H'1FD4 0084
REJ09B0256-0200
Access
Size
32
32
32
32
32
32
32
32
32
32