R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1268

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 29 Serial I/O with FIFO (SIOF)
29.3.3
SICTR is a 16-bit readable/writable register that sets the SIOF operating state.
Rev. 2.00 May 22, 2009 Page 1198 of 1982
REJ09B0256-0200
Initial value:
Bit
15
14
13 to 10 —
R/W:
BIt:
Control Register (SICTR)
Bit Name
SCKE
FSE
SCKE FSE
R/W
15
0
R/W
14
0
13
R
0
Initial
Value
0
0
All 0
12
R
0
R/W
R/W
R/W
R
11
R
0
10
R
0
Description
Serial Clock Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SCK output (outputs 0)
1: Enables the SIOF_SCK output
If this bit is set to 1, the SIOF initializes the baud rate
generator and initiates the operation. At the same time,
the SIOF outputs the clock generated by the baud rate
generator to the SIOF_SCK pin.
Frame Synchronous Signal Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SYNC output (outputs 0)
1: Enables the SIOF_SYNC output
If this bit is set to 1, the SIOF initializes the frame
counter and initiates the operation.
Reserved
These bits are always read as 0. The write value should
always be 0.
TXE
R/W
9
0
RXE
R/W
8
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
TXRST
R/W
1
0
RXRST
R/W
0
0

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