R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1153

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
1
Bit Name
RDF
Initial
Value
0
R/W
R/W*
1
Description
Receive FIFO Data Full
Indicates that the received data has been transferred
from SCRSR to SCFRDR, and the number of receive
data bytes in SCFRDR is equal to or greater than the
receive trigger number set by bits RTRG1 and RTRG0
in SCFCR.
0: The number of receive data bytes in SCFRDR is less
[Clearing conditions]
•
•
•
1: The number of receive data bytes in SCFRDR is
[Setting condition]
•
Section 27 Serial Communication Interface with FIFO (SCIF)
than the receive trigger set number
equal to or greater than the receive trigger set
number
Power-on reset or manual reset
When SCFRDR is read until the number of receive
data bytes in SCFRDR falls below the receive
trigger set number after reading RDF = 1, and 0 is
written to RDF
When SCFRDR is read by the DMAC until the
number of receive data bytes in SCFRDR falls
below the receive trigger set number
When SCFRDR contains at least the receive trigger
set number of receive data bytes*
Rev. 2.00 May 22, 2009 Page 1083 of 1982
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REJ09B0256-0200