R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1501

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
9 (cont.)
8
7
Bit Name
PDTA
DEL
Initial
Value
0
0
0
R/W
R/W
R/W
R
Description
The data bits used in SSIRDR or SSITDR are the
following:
Bits 31 down to (32 minus the number of bits in the
data word length specified by DWL).
That is, If DWL = 011, the data word length is 20 bits;
therefore, bits 31 to 12 in either SSIRDR or SSITDR are
used. All other bits are ignored or reserved.
The data bits used in SSIRDR or SSITDR are the
following:
Bits (the number of bits in the data word length
specified by DWL minus 1) to 0
i.e. if DWL = 011, then DWL = 20 and bits 19 to 0 are
used in either SSIRDR or SSITDR. All other bits are
ignored or reserved.
All data bits in SSIRDR or SSITDR are used on the
audio serial bus.
Serial Data Delay
0: 1 clock cycle delay between SSI_WS and
1: No delay between SSI_WS and SSI_SDATA
Reserved
This bit is always read as 0. The write value should
always be 0.
SSI_SDATA
DWL = 010, 011, 100, 101 (with a data word length
of 18, 20, 22 or 24 bits), PDTA = 0 (left-aligned)
DWL = 010, 011, 100, 101 (with a data word length
of 18, 20, 22 or 24 bits), PDTA = 1 (right-aligned)
DWL = 110 (with a data word length of 32 bits), the
PDTA setting is ignored.
Rev. 2.00 May 22, 2009 Page 1431 of 1982
Section 34 Serial Sound Interface (SSI)
REJ09B0256-0200

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