R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 421

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
3 to 0
Bit Name
IW[3:0]
Initial
Value
1111
R/W
R/W
Description
Insert Wait Cycle
Specify the number of wait cycles to be inserted.
(Available only when the SRAM interface, byte control
SRAM interface, or burst ROM interface is selected.)
0000: No cycle inserted
0001: 1 cycle inserted
0010: 2 cycles inserted
0011: 3 cycles inserted
0100: 4 cycles inserted
0101: 5 cycles inserted
0110: 6 cycles inserted
0111: 7 cycles inserted
1000: 8 cycles inserted
1001: 9 cycles inserted
1010: 11 cycles inserted
1011: 13 cycles inserted
1100: 15 cycles inserted
1101: 17 cycles inserted
1110: 21 cycles inserted
1111: 25 cycles inserted
Note: IW[2:0] specify the number of wait cycles to be
IW[1:0] specify the number of wait cycles to be inserted
into first data.
00: 1 cycle inserted into read cycle and no cycle
01: 1 cycle inserted into read cycle and 1 cycle inserted
10: 2 cycle inserted into read cycle and 2 cycle inserted
11: 3 cycle inserted into read cycle and 3 cycle inserted
IW2 specifies the number of wait cycle to be inserted
into second data or after.
0: No cycle inserted
1: 1 cycle inserted
IW3: Reserved
inserted into write cycle
into write cycle
into write cycle
into write cycle
inserted into read and write cycles when MPX
interface is selected.
Section 11 Local Bus State Controller (LBSC)
Rev. 2.00 May 22, 2009 Page 351 of 1982
REJ09B0256-0200