R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1172

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 27 Serial Communication Interface with FIFO (SCIF)
Figure 27.10 shows an example of the operation for transmission in asynchronous mode.
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
Figure 27.11 shows an example of the operation when modem control is used.
Rev. 2.00 May 22, 2009 Page 1102 of 1982
REJ09B0256-0200
the SCIF_CTS input value. When SCIF_CTS is set to 1 during transmission , the line goes to
the mark state after transmission of one frame. When SCIF_CTS is set to 0, the next transmit
data is output starting from the start bit.
TDFE
TEND
SCIF_TXD
Serial data
SCIF_CTS
Figure 27.11 Sample Operation Using Modem Control (SCIF_CTS)
Serial
data
1
TXI interrupt
request
Start
bit
Start
bit
Figure 27.10 Sample SCIF Transmission Operation
0
0
(Example with 8-Bit Data, Parity, One Stop Bit)
D0
D0
Data written to SCFTDR
and TDFE flag read as 1
then cleared to 0 by TXI
interrupt handler
D1
D1
One frame
Data
D7 0/1
Drive high before stop bit
D7
Parity
bit
Parity
bit
0/1
Stop
bit
TXI interrupt
request
Stop
bit
1
Start
bit
0
D0
D1
Start
bit
0
Data
D0 D1
D7
Parity
bit
0/1
Stop
bit
D7 0/1
1
Idle state
(mark state)
1