R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 323

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.3.6
INTMSK1 is 32-bit readable and writable with conditions registers that control mask settings for
each interrupt request. To clear the mask settings for interrupts, write 1 to the corresponding bits
in INTMSKCLR1. Writing 0 to bits in INTMSK1 is invalid.
Initial value:
Initial value:
Bit
31
30
29 to 24 
23 to 0
R/W:
R/W:
Bit:
Bit:
Interrupt mask register 1 (INTMSK1)
Bit Name
IM10

IM11
IM10 IM11
R/W
31
15
−
R
1
0
R/W
30
14
−
R
1
0
Initial
Value
1
1
All 1
All 0
29
−
13
−
R
R
1
0
28
12
−
−
R
R
1
0
R/W
R/W
R/W
R
R
27
11
−
−
R
R
1
0
−
26
10
−
R
R
1
0
Description
Sets masking of IRL3 to
IRL0 interrupt requests
when IRQ3/IRL3 to
IRQ0/IRL0 are encoded
interrupt input.
Sets masking of IRQ7/IRL7
to IRQ4/IRL4 interrupt
requests when IRL [7:4] are
encoded interrupt input.
Reserved
These bits are always read as 1. The write value should
always be 1.
Reserved
These bits are always read as 0. The write value should
always be 0.
25
−
−
R
R
1
9
0
24
−
−
R
R
1
8
0
23
−
−
R
R
0
7
0
Rev. 2.00 May 22, 2009 Page 253 of 1982
22
−
−
R
R
0
6
0
Section 9 Interrupt Controller (INTC)
21
−
−
R
R
0
5
0
[When reading]
0: Interrupts are accepted
1: Interrupts are masked
[When writing]
0: Invalid
1: Interrupts are masked
20
−
−
R
R
0
4
0
19
−
−
R
R
0
3
0
REJ09B0256-0200
18
−
−
R
R
0
2
0
−
−
17
R
R
0
1
0
16
−
−
R
R
0
0
0