R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1173

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(5)
Figure 27.12 shows a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
Serial Data Reception (Asynchronous Mode)
No
No
Figure 27.12 Sample Serial Reception Flowchart (1)
ER, DR, BRK or ORER = 1?
Clear RE bit in SCSCR to 0
Read ER, DR, BRK flags in
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Read receive data in
SCFSR and ORER
flag in SCFSR to 0
All data received?
Start of reception
End of reception
flag in SCLSR
RDF = 1?
No
Yes
Yes
Section 27 Serial Communication Interface with FIFO (SCIF)
Error handling
[1]
[2]
[3]
Yes
[1] Receive error handling and
[2] SCIF status check and receive
[3] Serial reception continuation
Rev. 2.00 May 22, 2009 Page 1103 of 1982
break detection:
Read the DR, ER, and BRK
flags in SCFSR, and the
ORER flag in SCLSR, to
identify any error, perform the
appropriate error handling,
then clear the DR, ER, BRK,
and ORER flags to 0. In the
case of a framing error, a
break can also be detected by
reading the value of the
SCIF_RXD pin.
data read:
Read SCFSR and check that
RDF = 1, then read the receive
data in SCFRDR, read 1 from
the RDF flag, and then clear
the RDF flag to 0. The
transition of the RDF flag from
0 to 1 can also be identified by
an RXI interrupt.
procedure:
To continue serial reception,
read at least the receive
trigger set number of receive
data bytes from SCFRDR,
read 1 from the RDF flag, then
clear the RDF flag to 0. The
number of receive data bytes
in SCFRDR can be
ascertained by reading from
SCRFDR.
REJ09B0256-0200

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