R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 454

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Local Bus State Controller (LBSC)
(2)
Figures 11.19 and 11.20 show the timing for the PCMCIA I/O card interface.
When accessing a PCMCIA card via the I/O card interface, it is possible to perform dynamic
sizing of the I/O bus width using the IOIS16 pin. With the 16-bit bus width selected, if the IOIS16
signal is high during the word-size I/O bus cycle, the I/O port is recognized as eight bits in bus
width. In this case, a data access for only eight bits is performed in the I/O bus cycle being
executed, and this is automatically followed by a data access for the remaining eight bits. Dynamic
bus sizing is also performed for byte-size access to address 2n + 1.
Figure 11.21 shows the basic timing for dynamic bus sizing.
Rev. 2.00 May 22, 2009 Page 384 of 1982
REJ09B0256-0200
I/O Card Interface Timing
IOWR
(Write)
CLKOUT
A25 to A0
CExx
PCC_REG (WE0)
RDWR
IORD
(read)
D15 to D0
(read)
D15 to D0
(Write)
BS
DACK
(DA)
DA: Dual address DMA
Figure 11.19 Basic Timing for PCMCIA I/O Card Interface
T
pci1
T
pci2

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