R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1171

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

In serial transmission, the SCIF operates as described below.
1. When data is written into SCFTDR, the SCIF transfers the data from SCFTDR to SCTSR and
2. When data is transferred from SCFTDR to SCTSR and transmission is started, consecutive
3. The SCIF checks the SCFTDR transmit data at the timing for sending the stop bit. If data is
starts transmitting. Confirm that the TDFE flag in SCFSR is set to 1 before writing transmit
data to SCFTDR. The number of data bytes that can be written is at least 64 − (transmit trigger
setting).
transmit operations are performed until there is no transmit data left in SCFTDR. When the
number of transmit data bytes in SCFTDR falls to or below the transmit trigger number set in
SCFCR, the TDFE flag is set. If the TIE bit in SCSCR is set to 1 at this time, a transmit-FIFO-
data-empty interrupt (TXI) request is generated.
The serial transmit data is sent from the SCIF_TXD pin in the following order.
(a) Start bit: One 0-bit is output.
(b) Transmit data: 8-bit or 7-bit data is output in LSB-first order.
(c) Parity bit: One parity bit (even or odd parity) is output. A format in which a parity bit is not
(d) Stop bit(s): One or two 1-bits (stop bits) are output.
(e) Mark state: 1 is output continuously until the start bit that starts the next transmission is
present, the data is transferred from SCFTDR to SCTSR, the stop bit is sent, and then serial
transmission of the next frame is started.
If there is no transmit data after the stop bit is sent, the TEND flag in SCFSR is set to 1, the
stop bit is sent, and then the line goes to the mark state in which 1 is output from the
SCIF_TXD pin.
output can also be selected.
sent.
Section 27 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 May 22, 2009 Page 1101 of 1982
REJ09B0256-0200