R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1384

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 31 Multimedia Card Interface (MMCIF)
31.3.13 Interrupt Status Registers 0 and 1 (INTSTR0, INTSTR1)
The INTSTR registers control MMCIF interrupts.
• INTSTR0
Rev. 2.00 May 22, 2009 Page 1314 of 1982
REJ09B0256-0200
Bit
0
Bit
7
6
Bit Name
CTERIE
Bit Name
FEI
FFI
Initial value:
Initial
Value
0
Initial
Value
0
0
R/W:
Bit:
R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
FEI
7
0
R/W
R/W
R/W
R/(W)* FIFO Empty Flag
R/(W)* FIFO Full Flag
FFI
6
0
Description
Command Timeout Error Flag Enable
0: Disables command timeout error flag setting.
1: Enables command timeout error flag setting.
Description
[Setting 1 condition]
When FIFO becomes empty while FEIE =
1 and write data is being transmitted
(when the FIFO_EMPTY bit in CSTR is
set)
[Clearing 0 condition]
Write 0 after reading FEI = 1.
[Setting 1 condition]
When FIFO becomes full while FFIE = 1
and read data is being received
(when the FIFO_FULL bit in CSTR is set)
[Clearing 0 condition]
Write 0 after reading FFI = 1.
DRPI
5
0
DTI
4
0
CRPI
3
0
CMDI
2
0
DBSYI
1
0
BTI
0
0
Interrupt
output
FSTAT
FSTAT