R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1280

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 29 Serial I/O with FIFO (SIOF)
Rev. 2.00 May 22, 2009 Page 1210 of 1982
REJ09B0256-0200
Bit
1
0
Bit Name
RFUDF
RFOVF
Initial
Value
0
0
R/W
R/W
R/W
Receive FIFO Overflow
Description
Receive FIFO Underflow
0: No receive FIFO underflow
1: Receive FIFO underflow
A receive FIFO underflow means that reading of
SIRDR has occurred when the receive FIFO is empty.
When a receive FIFO underflow occurs, the value of
data read from SIRDR is not guaranteed.
•
•
•
0: No receive FIFO overflow
1: Receive FIFO overflow
A receive FIFO overflow means that writing has
occurred when the receive FIFO is full.
When a receive FIFO overflow occurs, the SIOF
indicates overflow, and receive data is lost.
•
•
•
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.