R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 929

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23.3.39 Relay Function Set Register (Common) (TSU_FWSLC)
When the CAM is used, the referred area in the CAM entry table (partially or wholly) can be
specified by the TSU_POST1 to TSU_POST4 registers. TSU_FWSLC enables settings by the
TSU_POST1 to TSU_POST4 registers. This register must not be written to once after relay
operations have been enabled (after the FWEN0 bit in TSU_FWEN0 or the FWEN1 bit in
TSU_FWEN1 is set to 1).
Bit
31 to 14
13
12
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name

POSTENU
POSTENL
31
15


R
R
0
0
30
14


R
R
0
0
POST
R/W
ENU
29
13

R
0
0
0
0
Initial
Value
All 0
POST
R/W
ENL
28
12

R
0
0
27
11


R
R
0
0
R/W
R
R/W
R/W
26
10


R
R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Enables the settings of the POST field of CAM entry
tables 0 to 15 (settings by the TSU_POST1 and
TSU_POST2 registers).
0: Disables the settings of the POST field. (The CAM
1: Enables the settings of the POST field. (The CAM
Enables the settings of the POST field of CAM entry
tables 16 to 31 (settings by the TSU_POST3 and
TSU_POST4 registers).
0: Disables the settings of the POST field. (The CAM
1: Enables the settings of the POST field. (The CAM
25


R
R
0
9
0
entry table is referred to only in port 0 reception.)
entry table reference conditions follow the POST field
settings.)
entry table is referred to only in port 1 reception.)
entry table reference conditions follow the POST field
settings.)
24


R
R
0
8
0
Section 23 Gigabit Ethernet Controller (GETHER)
23


R
R
0
7
0
Rev. 2.00 May 22, 2009 Page 859 of 1982
22


R
R
0
6
0
21


R
R
0
5
0
20


R
R
0
4
0
19


R
R
0
3
0
REJ09B0256-0200
18


R
R
0
2
0
17


R
0
1
0
16


R
R
0
0
0