R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 566

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 13 PCI Controller (PCIC)
Rev. 2.00 May 22, 2009 Page 496 of 1982
REJ09B0256-0200
Bit
13 to 10 
9
8
Bit Name
TMTOI
MDEI
Initial
Value
All 0
0
0
R/W
SH: R
PCI: R
SH: R/WC
PCI: R
SH: R/WC
PCI: R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Target Memory Read Retry Timeout Interrupt
When the PCIC functions as a target, the master did
not attempt a retry within the prescribed number of
PCICLK clocks (2
memory read operations).
0: Target memory read retry timeout interrupt does
[Clear condition]
Write 1 to this bit (write clear).
1: Target memory read retry timeout interrupt occurs
[Set condition]
When a target memory read retry timeout interrupt
occurs.
Master Function Disable Error Interrupt
The PCIC attempted a master access when such
accesses are disabled, that is, when PCICMD.BM is
cleared to 0.
0: Master function disable error interrupt does not
[Clear condition]
Write 1 to this bit (write clear).
1: Master function disable error interrupt occurs
[Set condition]
When a master function disable error interrupt
occurs.
not occur
occur
15
) (detected only in the case of