R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 1979

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

D.
Table D.1 shows the list of mode control pins of this LSI.
Table D.1 Mode Control Pins
The state of the mode control pins of this LSI is sampled white a power-on reset is applied.
Therefore, these pins can serve as other functions in the other periods.
The method for switching between the control functions and other functions should be examined
referring to figure D.1. See section 40, General Purpose I/O (GPIO), or the relevant sections of the
applicable modules for whether the pins of the other functions are the input, output, or
input/output pins.
Pin Name
MD0, MD1, and MD2
MD3 and MD4
MD5
MD6
MD8
MD10
MPMD
List of Mode Control Pins and Schematic Diagram of External
Circuits
Chip mode
Function
Mode control
pins 0,1 and 2
Mode control
pins 3 and 4
Mode control pin
5
Mode control pin
6
Mode control pin
8
Mode control pin
10
control pin
Input
Input
Input
Input
Input
Input
Input
I/O
Description
Selects the clock-operating mode at a
power-on reset.
Selects the bus width and MPX interface of
area 0 at a power-on reset
Selects the endian at a power-on reset
Selects the PCI operating mode at a power-
on reset.
Selects whether to use the crystal resonator
at a power-on reset.
Selects the external CPU at a power-on
reset
Selects either emulation support mode or
LSI operation mode at a power-on reset.
Rev. 2.00 May 22, 2009 Page 1909 of 1982
REJ09B0256-0200
Appendix