R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 349

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Note:
9.3.20
INT2MSKCR is a 32-bit write-only register that clears any masking set in the interrupt mask
register. Setting bits in this register to 1 clears the masking of the corresponding interrupt sources.
Reading bits in this register is always 0.
Initial value:
Initial value:
Bit
2
1
0
R/W:
R/W:
Bit:
Bit:
*
Interrupt Mask Clear Register (INT2MSKCR)
This bit is reserved in the R5S77631A.
PCIC1 PCIC0 HAC CMT
Bit Name
SSI2
SSI1
SECURITY*
R/W
31
−
15
R
0
0
R/W
30
14
−
R
0
0
R/W
Initial
Value
1
1
1
29
−
13
R
0
0
R/W
−
28
12
R
0
0
R/W
R/W
R/W
R/W
27
−
11
−
R
R
0
0
26
−
10
−
R
R
0
0
Function
Masks SSI2 interrupts
Masks SSI1 interrupts
Masks SECURITY interrupts
GPIO
R/W
−
25
R
0
9
0
DMAC H-UDI
R/W
24
−
R
0
8
0
SSI0 MMC
R/W
R/W
23
0
7
0
Rev. 2.00 May 22, 2009 Page 279 of 1982
R/W
22
−
R
0
6
0
Section 9 Interrupt Controller (INTC)
WDT SCIF1 SCIF0 RTC TMU1 TMU0
R/W
21
−
R
0
5
0
SIOF0 PCIC5 PCIC4 PCIC3 PCIC2
R/W
R/W
20
0
4
0
Description
Masks interrupts for
each peripheral
module.
[When writing]
0: Invalid
1: Interrupts are
[When reading]
0: No mask setting
1: Mask setting
R/W
R/W
masked
19
0
3
0
REJ09B0256-0200
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0