R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 977

• Manufacturer Part Number: R5S77631Y266BGV
• Description: IC SUPERH MPU ROMLESS 499BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R5S77631Y266BGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 107
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 499-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
31 to 7
6
5, 4
3, 2
1
0
Bit Name

DE
DL[1:0]

SWRT
SWRR
Initial
Value
All 0
0
00
All 0
0
0
R/W
R
R/W
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit/Receive Frame Endian
Sets the endian mode for DMA transfer of frame data
between the transmit/receive FIFO and transmit/receive
buffer.
0: Big endian (longword access)
1: Little endian (longword access)
Transmit/Receive Descriptor Length
These bits specify the descriptor length. (See section
23.4.1, Descriptors and Descriptor List.)
00: 16 bytes
01: 32 bytes
10: 64 bytes
11: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
Software Reset of Transmit FIFO Controller
[Writing]
0: Disabled
1: Software reset started
[Reading]
0: Software reset not executed (or completed)
1: Software reset being executed
Software Reset of Receive FIFO Controller
[Writing]
0: Disabled
1: Software reset started
[Reading]
0: Software reset not executed (or completed)
1: Software reset being executed
Section 23 Gigabit Ethernet Controller (GETHER)
Rev. 2.00 May 22, 2009 Page 907 of 1982
REJ09B0256-0200