R5S77631Y266BGV Renesas Electronics America, R5S77631Y266BGV Datasheet - Page 492

IC SUPERH MPU ROMLESS 499BGA

R5S77631Y266BGV

Manufacturer Part Number
R5S77631Y266BGV
Description
IC SUPERH MPU ROMLESS 499BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R5S77631Y266BGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
266MHz
Connectivity
Audio Codec, I²C, MMC, SCI, SIM, SIO, SSI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
107
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
499-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S77631Y266BGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 DDR-SDRAM Interface (DDRIF)
Rev. 2.00 May 22, 2009 Page 422 of 1982
REJ09B0256-0200
Bit
8
7 to 4
3
2, 1
0
Bit Name
ENDIAN
DLLEN
DCE
Initial
Value
Undefined R
All 0
0
All 0
0
R/W
R
R/W
R
R/W
Description
Endian Identification
Indicates whether the big endian mode or little endian
mode is set to the external data bus.
1: Big endian mode
0: Little endian mode
Reserved
These bits are always read as 0. The write value
should always be 0.
DLL Enable
Sets whether the DLL for generating the read timing for
the DDR-SDRAM is valid or invalid. When this bit is
set to 1, the DLL is enabled and read access to
memory is possible.
Reserved
These bits are always read as 0. The write value
should always be 0.
DDR Controller Enable
Enables SDRAM control by the DDRIF.
1: Enable
0: Disable

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